Murali Jayapala

aspdac2009_ittetsu

Summary

Systematic Architecture Exploration based on Optimistic Cycle Estimation for Low Energy Embedded Processors. Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi and Masaharu Imai. In The 14th Asia and South Pacific Design Automation Conference (ASP-DAC), pages 449-454, Jan 2009.

Bibtex entry

@INPROCEEDINGS { aspdac2009_ittetsu,
    AUTHOR = { Ittetsu Taniguchi and Murali Jayapala and Praveen Raghavan and Francky Catthoor and Keishi Sakanushi and Yoshinori Takeuchi and Masaharu Imai },
    TITLE = { Systematic Architecture Exploration based on Optimistic Cycle Estimation for Low Energy Embedded Processors },
    BOOKTITLE = { The 14th Asia and South Pacific Design Automation Conference (ASP-DAC) },
    PAGES = { 449-454 },
    MONTH = { Jan },
    YEAR = { 2009 },
}