Murali Jayapala

jmur18

Summary

Low Power Coarse-Grained Reconfigurable Instruction Set Processor. Francisco Barat, Murali Jayapala, Tom Vander Aa, Geert Deconinck, Rudy Lauwereins and Henk Corporaal. In Proc of 13th International Conference on Field Programmable Logic and Applications (FPL), September 2003.

Bibtex entry

@INPROCEEDINGS { jmur18,
    AUTHOR = { Francisco Barat and Murali Jayapala and Tom Vander Aa and Geert Deconinck and Rudy Lauwereins and Henk Corporaal },
    TITLE = { Low Power Coarse-Grained Reconfigurable Instruction Set Processor },
    BOOKTITLE = { Proc of 13th International Conference on Field Programmable Logic and Applications (FPL) },
    MONTH = { September },
    YEAR = { 2003 },
}